The present inventive concept relates to semiconductor devices and methods of fabricating the same and, more particularly, to three-dimensional semiconductor memory devices and methods of fabricating the same.
Semiconductor devices are very attractive in an electronic industry because of the small size, functionality and/or low fabrication cost thereof. The integration density of semiconductor memory devices in particular has increased with the development of the electronic industry. The integration density of semiconductor memory devices may directly affect the cost thereof. That is, as the integration density of the semiconductor memory devices is increased, the cost of the semiconductor memory devices may be reduced. Thus, there is an increasing demand for semiconductor memory devices with increased integration density.
Generally, the integration density of the semiconductor memory devices is directly related to the planar area occupied by a unit memory cell. Accordingly, the integration density of semiconductor memory devices may be influenced by the process technology used for forming fine patterns. However, there may be limitations in improving the process technology for forming the fines patterns due to high cost equipments and/or difficulty of the process technology.
Recently, three-dimensional semiconductor memory devices have been proposed as a way of increasing integration density using existing patterning technology. However, in fabrication of the three-dimensional semiconductor memory devices, various problems may be encountered due to structural configurations thereof. For example, the reliability of the three-dimensional semiconductor memory devices may be degraded.